1. Field of the Invention
This invention relates to improvements in phase-locked loops, and more particularly to improvements in phase-locked loop circuitry in which the loop gain may be maximized while avoiding undesired performance degrading amplifier saturation in self sweeping and locking circuits.
2. Description of the Prior Art
Microwave communications systems commonly employ phase-locked oscillators to generate or detect RF signals. Commonly, a voltage controlled oscillator (VCO) is phase-locked to a crystal controlled reference oscillator. The output of the VCO supplies the output signal, and the entire phase-locked subsystem is referred to as an RF source. The phase-locked loop controlling the VCO has an effective loop bandwidth, and at frequencies above the loop bandwidth the FM noise of the source approaches that of the unlocked VCO. At frequencies below the loop bandwidth, the FM noise of the source approaches that of the reference oscillator.
Since the FM noise and frequency stability characteristics of the reference oscillator and VCO are different, the loop bandwidth is usually chosen for the best FM noise performance of the source. Generally, the VCO is more susceptible than the reference oscillator to frequency instabilities caused by mechanical shock, intermittent contact, temperature changes, and the like. The higher the loop gain, the more completely the VCO frequency can be locked to that of the reference oscillator at frequencies within the loop bandwidth. This higher loop gain, combined with the DC offset of the non-ideal phase detector, can cause the phase-locked loop amplifier to saturate at either minimum or maximum output voltage. The ideal phase detector has an output voltage directly proportional to the phase difference between the two signals. When the two oscillators are not phase locked (i.e. are operating on different frequencies) this phase difference constantly changes alternatively becoming positive and negative. For these unlocked oscillators, the long term average of the phase difference is zero, and as a result the long term average (DC) output voltage of an ideal phase detector would be zero. The non-ideal phase detector can have a DC output (offset) when it is driven by two unlocked oscillators. The loop amplifiers can also have DC offsets with effects similar to those caused by the DC offset of the phase detector.
In the prior art sources, an automatic sweep circuit is employed to sweep the VCO when the phase-locked loop is not locked. This type of sweep circuit works by applying frequency selective positive feedback around the phase-locked loop amplifier. When the phase-locked loop is locked, negative feedback appears from the output of the loop amplifier through the VCO and phase detector to the input of the loop amplifier. The negative feedback of the phase-locked loop overcomes the positive feedback of the sweep circuit, so the sweep oscillator does not operate when the loop is locked. On the other hand, when the loop is unlocked, the negative feedback goes away, and the positive feedback of the sweep circuit causes the loop amplifier to oscillate, sweeping the VCO over its full electronic tuning range. When the VCO frequency comes close to that of the reference oscillator, phase lock is reacquired.
If the DC offset of the phase detector combined with the high gain of the loop amplifier should cause the loop amplifier to saturate; however, it will prevent the sweep oscillator from oscillating. The reason for this is that the incremental gain of a saturated amplifier is very low and the loop gain of the sweep oscillator is inadequate to start the sweep oscillations.
In the prior art, this problem has forced the source designer to reduce his loop gain below optimum to continue to insure sweep circuit operation over the phase detector DC offset range.
As a related matter, reference is made to my copending U.S. Pat. application, Ser. No. 399,536, filed July 19, 1982, entitled PHASED-LOCKED LOOP WITH INCREASED LOW FREQUENCY GAIN, which is assigned to the assignee hereof, is incorporated herein by reference, and provides a third-order phase-locked loop wherein the gain rises at the rate of 18 dB per octave inside the loop bandwidth. This allows increased gain to be had, especially at the middle and higher end frequencies within the loop bandwidth. The problem now addressed is the enablement of a designer to use the higher gain in view of possible DC offsets which limit the amplifier gain which can be used at low frequencies without resulting in DC saturation of the amplifier.